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INTEGRATED CIRCUITS
74F173 Quad D-type flip-flop (3-State)
Product specification IC15 Data Handbook 1990 Aug 31
Philips Semiconductors
Philips Semiconductors
Product specification
Quad D-type flip–flop (3-State)
74F173
FEATURES
• Edge–triggered D–type register • Gated clock enable for hold ”do nothing” mode • 3–state output buffers • Gated output enable control • Speed upgrade of N8T10 and current sink upgrade • Controlled output edges to minimize ground bounces • 48mA sinking capability
DESCRIPTION
The 74F173 is a high speed 4–bit parallel load register with clock enable control, 3–state buffered outputs, and master reset (MR).