74F109 - Dual JK Positive Edge-Triggered Flip-Flop

Description

The F109 consists of two high-speed, completely independent transition clocked JK flip-flops.

The clocking operation is independent of rise and fall times of the clock waveform.

The JK design allows operation as a D-type flip-flop (refer to F74 data sheet) by connecting the J and K inputs.

Fairchild Semiconductor

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Datasheet Details

Part number	74F109
Manufacturer	Fairchild Semiconductor
File Size	79.72 KB
Description	Dual JK Positive Edge-Triggered Flip-Flop
Datasheet	74F109 Datasheet
Additional preview pages of the 74F109 datasheet.

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Full PDF Text Transcription

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74F109 Dual JK Positive Edge-Triggered Flip-Flop April 1988 Revised November 1999 74F109 Dual JK Positive Edge-Triggered Flip-Flop General Description The F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-type flip-flop (refer to F74 data sheet) by connecting the J and K inputs.

Published: Apr 3, 2005 |