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Si5323 - PIN-PROGRAMMABLE PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

Features

  • Pin-selectable output frequencies.
  • Dual clock outputs with selectable ranging from 8 kHz.
  • 708 MHz signal format (LVPECL, LVDS, CML,.
  • Ultra-low jitter clock outputs as low CMOS) as 250 fs rms (12 kHz.
  • 20 MHz).
  • Support for ITU G.709 FEC ratios 270 fs rms (50 kHz.
  • 80 MHz) (255/238, 255/237, 255/236).
  • Integrated loop filter with selectable.
  • LOL, LOS alarm outputs loop bandwidth (60 Hz.
  • 8.4 kHz).
  • Pin-controlled output phase adj.

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Datasheet preview – Si5323

Datasheet Details

Part number Si5323
Manufacturer Silicon Laboratories
File Size 1.38 MB
Description PIN-PROGRAMMABLE PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR
Datasheet download datasheet Si5323 Datasheet
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Full PDF Text Transcription

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Si5323 PIN-PROGRAMMABLE PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR Features  Pin-selectable output frequencies  Dual clock outputs with selectable ranging from 8 kHz–708 MHz signal format (LVPECL, LVDS, CML,  Ultra-low jitter clock outputs as low CMOS) as 250 fs rms (12 kHz–20 MHz)  Support for ITU G.709 FEC ratios 270 fs rms (50 kHz–80 MHz) (255/238, 255/237, 255/236)  Integrated loop filter with selectable  LOL, LOS alarm outputs loop bandwidth (60 Hz–8.4 kHz)  Pin-controlled output phase adjust  Meets ITU-T G.8251 and Telcordia  Single supply 1.8 ±5%, 2.5 or 3.
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