The K4D263238G is 134,217,728 bits of hyper synchronous data rate Dynamic RAM organized as 4 x1,048,576 words by 32 bits, fabricated with SAMSUNG’s high performance CMOS technology.
Key Features
2.5V ± 5% power supply for device operation.
2.5V ± 5% power supply for I/O interface.
SSTL_2 compatible inputs/outputs.
4 banks operation.
MRS cycle with address key programs -. Read latency 3, 4 (clock) -. Burst length (2, 4 and 8) -. Burst type (sequential & interleave).
All inputs except data & DM are sampled at the positive going edge of the system clock.
Full PDF Text Transcription for K4D263238G-GC (Reference)
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K4D263238G-GC 128M GDDR SDRAM 128Mbit GDDR SDRAM 1M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL (144-Ball FBGA) Re...
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ronous DRAM with Bi-directional Data Strobe and DLL (144-Ball FBGA) Revision 1.4 November 2004 Samsung Electronics reserves the right to change products or specification without notice. - 1 - Rev 1.4 (Nov 2004) K4D263238G-GC Revision History Revision 1.4(Nov 30, 2004) • Typo Corrected in DC table 128M GDDR SDRAM Revision 1.3(Nov 12, 2004) • Changed AC spec format • Changed DC spec measurement condition from VDD(typ) to VDD(max) Revision 1.2(Oct 18, 2004) • Changed unit of tWR and tWR_A from ns to tCK to avoid misuse. • Added lower speed timing set Revision 1.1(August 31, 2004) • Added 100% driver strength option as A6A1="1
K4D263238G-GC Datasheet
