IDT23S09 Datasheet PDF - Renesas 3.3V ZERO DELAY CLOCK BUFFER Specs

IDT23S09 - 3.3V ZERO DELAY CLOCK BUFFER

Datasheet Summary

Description

The IDT23S09 is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications.

The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz.

Features

Phase-Lock Loop Clock Distribution.
10MHz to 133MHz operating frequency.
Distributes one clock input to one bank of five and one bank of four outputs.
Separate output enable for each output bank.
Output Skew < 250ps.
Low jitter.

Datasheet Details

Part number	IDT23S09
Manufacturer	Renesas
File Size	189.84 KB
Description	3.3V ZERO DELAY CLOCK BUFFER
Datasheet	IDT23S09 Datasheet
Additional preview pages of the IDT23S09 datasheet.

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Full PDF Text Transcription

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IDT23S09 3.3V ZERO DELAY CLOCK BUFFER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE IDT23S09 FEATURES: • Phase-Lock Loop Clock Distribution • 10MHz to 133MHz operating frequency • Distributes one clock input to one bank of five and one bank of four outputs • Separate output enable for each output bank • Output Skew < 250ps • Low jitter <200 ps cycle-to-cycle • IDT23S09-1 for Standard Drive • IDT23S09-1H for High Drive • No external RC network required • Operates at 3.3V VDD • Spread spectrum compatible • Available in SOIC and TSSOP packages DESCRIPTION: The IDT23S09 is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications.

Published: Aug 3, 2021 |