Datasheet4U Logo Datasheet4U.com

IDT23S05 - 3.3V ZERO DELAY CLOCK BUFFER

Datasheet Summary

Description

The IDT23S05 is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications.

The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz.

Features

  • Phase-Lock Loop Clock Distribution.
  • 10MHz to 133MHz operating frequency.
  • Distributes one clock input to one bank of five outputs.
  • Zero Input-Output Delay.
  • Output Skew < 250ps.
  • Low jitter.

📥 Download Datasheet

Datasheet preview – IDT23S05

Datasheet Details

Part number IDT23S05
Manufacturer Renesas
File Size 288.52 KB
Description 3.3V ZERO DELAY CLOCK BUFFER
Datasheet download datasheet IDT23S05 Datasheet
Additional preview pages of the IDT23S05 datasheet.
Other Datasheets by Renesas

Full PDF Text Transcription

Click to expand full text
IDT23S05 3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE IDT23S05 FEATURES: • Phase-Lock Loop Clock Distribution • 10MHz to 133MHz operating frequency • Distributes one clock input to one bank of five outputs • Zero Input-Output Delay • Output Skew < 250ps • Low jitter <200 ps cycle-to-cycle • IDT23S05-1 for Standard Drive • IDT23S05-1H for High Drive • No external RC network required • Operates at 3.3V VDD • Power down mode • Spread spectrum compatible • Available in SOIC package DESCRIPTION: The IDT23S05 is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications.
Published: |