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IS43R16800E - 128Mb DDR SDRAM

Datasheet Summary

Description

x16 A0-A11 Row Address Input A0-A8 Column Address Input BA0, BA1 Bank Select Address DQ0 DQ15 Data I/O CK, CK System Clock Input CKE Clock Enable CS Chip Select CAS Column Address Strobe Command RAS Row Address Strobe Command WE Write Enable 4 66 VSS 65 DQ15 64 VSSQ 6

Features

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Datasheet Details

Part number IS43R16800E
Manufacturer Integrated Silicon Solution
File Size 873.87 KB
Description 128Mb DDR SDRAM
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IS43/46R16800E, IS43/46R32400E 4Mx32, 8Mx16 JANUARY 2014 128Mb DDR SDRAM FEATURES DEVICE OVERVIEW • VDD and VDDQ: 2.5V ± 0.2V (-5,-6) • VDD and VDDQ: 2.5V ± 0.1V (-4) • SSTL_2 compatible I/O • Double-data rate architecture; two data transfers per clock cycle • Bidirectional, data strobe (DQS) is transmitted/ received with data, to be used in capturing data at the receiver • DQS is edge-aligned with data for READs and centre-aligned with data for WRITEs • Differential clock inputs (CK and CK) • DLL aligns DQ and DQS transitions with CK transitions • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS • Four internal banks for concurrent operation • Data Mask for write data.
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