IS43R16800A-6 Datasheet PDF - Integrated Silicon Solution 8Meg x 16 128-MBIT DDR SDRAM Specs

IS43R16800A-6 - 8Meg x 16 128-MBIT DDR SDRAM

Datasheet Summary

Description

A0-A11 A0-A8 BA0, BA1 DQ0 to DQ15 CK CKE CS RAS CAS Row Address Input Column Address Input Bank Select Address Data I/O System Clock Input Clock Enable Chip Select Row Address Strobe Command Column Address Strobe Command WE LDM, UDM LDQS, UDQS VDD Vss VDDQ VssQ NC Write Enable x16 Input/Output Mask

Features

ISSI DEVICE.

Datasheet Details

Part number	IS43R16800A-6
Manufacturer	Integrated Silicon Solution
File Size	539.60 KB
Description	8Meg x 16 128-MBIT DDR SDRAM
Datasheet	IS43R16800A-6 Datasheet
Additional preview pages of the IS43R16800A-6 datasheet.

📁 Similar Datasheet

IS43R16160B - 256Mb DDR Synchronous DRAM (ISSI)

IS43R16160D - DDR SDRAM (ISSI)

IS43R16320F - 512Mb DDR SDRAM (ISSI)

IS43R16400B - Four internal banks for concurrent operation (ISSI)

IS43R32800D - DDR SDRAM (ISSI)

IS43R83200B - 256Mb DDR Synchronous DRAM (ISSI)

IS43R83200D - DDR SDRAM (ISSI)

IS43R86400F - 512Mb DDR SDRAM (ISSI)

IS431 - (IS431 / IS432) TOTEM POLE OUTPUT TYPE OPIC LIGHT DETECTOR (Sharp Electrionic Components)

Full PDF Text Transcription

Click to expand full text

IS43R16800A-6 8Meg x 16 128-MBIT DDR SDRAM FEATURES ISSI DEVICE OVERVIEW ® PRELIMINARY INFORMATION APRIL 2006 • • • • • • • • • • • • • Clock Frequency: 166, 133 MHz Power supply (VDD and VDDQ): 2.5V SSTL 2 interface Four internal banks to hide row Pre-charge and Active operations Commands and addresses register on positive clock edges (CK) Bi-directional Data Strobe signal for data capture Differential clock inputs (CK and CK) for two data accesses per clock cycle Data Mask feature for Writes supported DLL aligns data I/O and Data Strobe transitions with clock inputs Half-strength and Matched drive strength options Programmable burst length for Read and Write operations Programmable CAS Latency (2, 2.

Published: Jan 11, 2010 |