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K4S560832D 256Mbit SDRAM 8M x 8bit x 4 Banks Synchronous DRAM LVTTL

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Description

K4S560832D CMOS SDRAM 256Mbit SDRAM 8M x 8bit x 4 Banks Synchronous DRAM LVTTL Revision 1.1 May.2003 * Samsung Electronics reserves the right.
The K4S560832D is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 8,392,608 words by 8bits, fabricated with SAMSUNG's high pe.

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Datasheet Specifications

Part number
K4S560832D
Manufacturer
Samsung semiconductor
File Size
118.69 KB
Datasheet
K4S560832D_Samsungsemiconductor.pdf
Description
256Mbit SDRAM 8M x 8bit x 4 Banks Synchronous DRAM LVTTL

Features

* JEDEC standard 3.3V power supply
* LVTTL compatible with multiplexed address
* Four banks operation
* MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave)
* All inputs are

Applications

* ORDERING INFORMATION Max Freq. 133MHz(CL=2) 133MHz(CL=3) 100MHz(CL=2) 100MHz(CL=3) LVTTL 54pin TSOP(II) Interface Package FUNCTIONAL BLOCK DIAGRAM I/O Control LWE LDQM Data Input Register Bank Select 8M x 8 Sense AMP 8M x 8 8M x 8 8M x 8 Refresh Counter Output Buffer Row Decoder Row Buffer

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