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K4S561632C 256Mbit SDRAM

K4S561632C Description

www.DataSheet4U.com K4S561632C CMOS SDRAM 256Mbit SDRAM 4M x 16bit x 4 Banks Synchronous DRAM LVTTL Revision 0.4 Sept.2001 * Samsung Electro.
The K4S561632C is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 4,196,304 words by 16 bits, fabricated with SAMSUNG's high.

K4S561632C Features

* JEDEC standard 3.3V power supply
* LVTTL compatible with multiplexed address
* Four banks operation
* MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave)
* All inputs are

K4S561632C Applications

* ORDERING INFORMATION Max Freq. 166MHz(CL=3) 133MHz(CL=2) 133MHz(CL=3) 100MHz(CL=2) 100MHz(CL=3) LVTTL 54pin TSOP(II) Interface Package FUNCTIONAL BLOCK DIAGRAM I/O Control LWE Data Input Register LDQM Bank Select 4M x 16 4M x 16 4M x 16 4M x 16 Refresh Counter Output Buffer Row Decoder Se

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Datasheet Details

Part number
K4S561632C
Manufacturer
Samsung
File Size
226.17 KB
Datasheet
K4S561632C_Samsung.pdf
Description
256Mbit SDRAM

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256Mbit SDRAM Samsung
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