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IS42VM16400K - 1M x 16Bits x 4Banks Mobile Synchronous DRAM

Download the IS42VM16400K datasheet PDF (IS42SM included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for 1m x 16bits x 4banks mobile synchronous dram.

Description

These IS42SM/RM/VM16400K are mobile 67,108,864 bits CMOS Synchronous DRAM organized as 4 banks of 1,048,567 words x 16 bits.

These products are offering fully synchronous operation and are referenced to a positive edge of the clock.

Features

  • JEDEC standard 3.3V, 2.5V, 1.8V power supply.
  • Auto refresh and self refresh.
  • All pins are compatible with LVCMOS interface.
  • 4K refresh cycle / 64ms.
  • Programmable Burst Length and Burst Type - 1, 2, 4, 8 or Full Page for Sequential Burst - 4 or 8 for Interleave Burst.
  • Programmable CAS Latency : 2,3 clocks.
  • All inputs and outputs referenced to the positive edge of the system clock.
  • Data mask function by DQM.
  • Internal 4 b.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IS42SM_ISSI.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by ISSI
  • IS42VM16160E - 4M x 16Bits x 4Banks Mobile Synchronous DRAM
  • IS42VM16160M - 4M x 16Bits x 4Banks Mobile Synchronous DRAM
  • IS42VM16200C - 1M x 16Bits x 2Banks Low Power Synchronous DRAM
  • IS42VM16200D - 1M x 16Bits x 2Banks Low Power Synchronous DRAM
  • IS42VM16800E - 128Mb Mobile Synchronous DRAM
  • IS42VM16800F - 2M x 16Bits x 4Banks Mobile Synchronous DRAM
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Full PDF Text Transcription

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IS42SM/RM/VM16400K 1M x 16Bits x 4Banks Mobile Synchronous DRAM Description These IS42SM/RM/VM16400K are mobile 67,108,864 bits CMOS Synchronous DRAM organized as 4 banks of 1,048,567 words x 16 bits. These products are offering fully synchronous operation and are referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve high bandwidth. All input and output voltage levels are compatible with LVCMOS. Features  JEDEC standard 3.3V, 2.5V, 1.
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