Description
These P-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology.
Features
- -2.8 A, -20 V. RDS(ON) = 0.130 Ω @ VGS = -4.5 V RDS(ON) = 0.180 Ω @ VGS = -2.5 V. SuperSOTTM-6 package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. SOT-23
SuperSOTTM-6
SuperSOTTM-8
SO-8
SOT-223
SOIC-16
S D D
1 6
.63
6
2 5
G SuperSOT
TM
pin 1
D D
3
4
-6
Absolute Maximum Ratings T A = 25°C unless otherwise noted
Symbol Parameter VDSS V.
FDC636P_FairchildSemiconductor.pdf
