FDC6304P Datasheet (Fairchild Semiconductor) - Digital FET/ Dual P-Channel

FDC6304P, Digital FET/ Dual P-Channel

These P-Channel enhancement mode field effect transistor are produced using Fairchild's proprietary, high cell density, DMOS technology.

This very high density process is tailored to minimize on-state resistance at low gate drive conditions.

This device is designed especially for application in batt

FDC6304P Features

* -25 V, -0.46 A continuous, -1.0 A Peak. RDS(ON) = 1.5 Ω @ VGS= -2.7 V RDS(ON) = 1.1 Ω @ VGS = -4.5 V. Very low level gate drive requirements allowing direct operation in 3V circuits. VGS(th) < 1.5 V. Gate-Source Zener for ESD ruggedness. >6kV Human Body Model. SOT-23 SuperSOTTM-6 Mark: .304 Super