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IS43R16320A - 32Meg x 16 512-MBIT DDR SDRAM

Description

A0-A12 A0-A9 BA0, BA1 DQ0 to DQ15 CK, CK CKE CS RAS CAS Row Address Input Column Address Input Bank Select Address Data I/O System Clock Input Clock Enable Chip Select Row Address Strobe Command Column Address Strobe Command WE LDM, UDM LDQS, UDQS VDD Vss VDDQ VssQ VREF DNU NC 2 Write Enable x16 In

Features

  • DEVICE.

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IS43R16320A 32Meg x 16 512-MBIT DDR SDRAM FEATURES DEVICE OVERVIEW ISSI MARCH 2006 ® • • • • • • • • • • • • Clock Frequency: 166 MHz Power supply (VDD and VDDQ) DDR 333: 2.5V + 0.2V SSTL 2 interface Four internal banks to hide row Pre-charge and Active operations Commands and addresses register on positive clock edges (CK) Bi-directional Data Strobe signal for data capture Differential clock inputs (CK and CK) for two data accesses per clock cycle Data Mask feature for Writes supported DLL aligns data I/O and Data Strobe transitions with clock inputs Programmable burst length for Read and Write operations Programmable CAS Latency (2 or 2.5 clocks) ISSI’s 512-Mbit DDR SDRAM achieves high-speed data transfer using pipeline architecture and two data word accesses per clock cycle.
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