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HD74ALVCH162500 - 18-bit Universal Bus Transceivers with 3-state Outputs

Description

Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock ( CLKAB and CLKBA) inputs.

For A to B data flow, the device operates in the transparent mode when LEAB is high.

Features

  • VCC = 2.3 V to 3.6 V.
  • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C).
  • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C).
  • High output current ±12 mA (@VCC = 3.0 V).
  • Bus hold on data inputs eliminates the need for external pullup / pulldown resistors.
  • All outputs have equivalent 26 Ω series resistors, so no external resistors are required. HD74ALVCH162500 Function Table.
  • 3 Inputs OEAB L H H H H H H LEAB X H H L L L L C.

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Other Datasheets by Hitachi Semiconductor (now Renesas)

Part Number Description
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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HD74ALVCH162500 18-bit Universal Bus Transceivers with 3-state Outputs ADE-205-181 (Z) Preliminary 1st. Edition December 1996 Description Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock ( CLKAB and CLKBA) inputs. For A to B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A bus data is stored in the latch flip flop on the high to low transition of CLKAB. Output enable OEAB is active high. When OEAB is high, the B port outputs are active. When OEAB is low, the B port outputs are in the high impedance state. Data flow for B to A is similar to that of A to B but uses OEBA, LEBA, and CLKBA.