The 74F113 offers individual J, K, Set and Clock inputs.
When the clock goes HIGH the inputs are enabled and data may be entered.
| Part number | 74F113 |
|---|---|
| Manufacturer | Fairchild (onsemi) |
| File Size | 59.84 KB |
| Description | Dual JK Negative Edge-Triggered Flip-Flop |
| Datasheet |
 74F113 Datasheet
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| Part Number | Description | Manufacturer |
|---|---|---|
| 74F113 | Dual J-K negative edge-triggered flip-flops | NXP |
| 74F11 | Triple 3-Input AND Gate | National Semiconductor |
| 74F11 | Triple 3-input NAND gate | NXP |
| 74F11 | Triple 3-Input AND Gate | Texas Instruments |
| 74F112 | Dual J-K negative edge-triggered flip-flop | NXP |
| Part Number | Description |
|---|---|
| 74F11 | Triple 3-Input AND Gate |
| 74F112 | Dual JK Negative Edge-Triggered Flip-Flop |
| 74F114 | Dual JK Negative Edge-Triggered Flip-Flop |
| 74F10 | Triple 3-Input NAND Gate |
| 74F1056 | 8-Bit Schottky Barrier Diode Array |
The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.
