EDJ2116DEBG Features
* Double-data-rate architecture: two data transfers per clock cycle
* The high-speed data transfer is realized by the 8 bits prefetch pipelined architecture
* Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the re
Datasheet Details
EDJ2116DEBG, EDJ2108DEBG
Elpida Memory
297.00 KB
2g bits ddr3 sdram.
This datasheet PDF includes multiple part numbers: EDJ2116DEBG, EDJ2108DEBG.
Please refer to the document for exact specifications by model.
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EDJ2116DEBG Distributor
