EDJ1116DBSE Features
* Double-data-rate architecture; two data transfers per clock cycle
* The high-speed data transfer is realized by the 8 bits prefetch pipelined architecture
* Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the re
EDJ1116DBSE, EDJ1108DBSE Datasheet
Datasheet Details
EDJ1116DBSE, EDJ1108DBSE
Elpida Memory
2.19 MB
64m words x 16 bits 1g bits ddr3 sdram.
This datasheet PDF includes multiple part numbers: EDJ1116DBSE, EDJ1108DBSE.
Please refer to the document for exact specifications by model.
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EDJ1116DBSE Distributor
