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CY7C1352F - 4-Mbit (256K x 18) Pipelined SRAM

General Description

1] The CY7C1352F is a 3.3V, 256K x 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true bac

Key Features

  • Pin compatible and functionally equivalent to ZBT™ devices.
  • Internally self-timed output buffer control to eliminate the need to use OE.
  • Byte Write capability.
  • 256K x 18 common I/O architecture.
  • Single 3.3V power supply.
  • 2.5V / 3.3V I/O Operation.
  • Fast clock-to-output times.
  • 2.6 ns (for 250-MHz device).
  • 2.6 ns (for 225-MHz device).
  • 2.8 ns (for 200-MHz device).
  • 3.5 ns (for 166-MHz device).

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CY7C1352F 4-Mbit (256Kx18) Pipelined SRAM with NoBL™ Architecture Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability • 256K x 18 common I/O architecture • Single 3.3V power supply • 2.5V / 3.3V I/O Operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5 ns (for 166-MHz device) — 4.0 ns (for 133-MHz device) — 4.