STMicroelectronics |
M36L0T7050 |
128Mbit (Multiple Bank / Multi-Level / Burst) Flash Memory 32Mbit (2M x16) PSRAM |
Cypress |
CY7C1370KVE33 |
18-Mbit (512K x 36/1M x 18) Pipelined SRAM |
Cypress |
CY7C1424AV18 |
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture |
STMicroelectronics |
M36L0T8060T1 |
(M36L0T8060B1 / M36L0T8060T1) 256 Mbit Flash memory and 64 Mbit PSRAM |
STMicroelectronics |
M36L0R8060 |
256 Mbit (Multiple Bank / Multi-Level / Burst) Flash Memory 64 Mbit (Burst) PSRAM |
STMicroelectronics |
M36W432TG |
32 Mbit 2Mb x16 / Boot Block Flash Memory and 4 Mbit 256Kb x16 SRAM |
Cypress |
CYF2018V |
18/36/72-Mbit Programmable Multi-Queue FIFOs |
STMicroelectronics |
M36DR232 |
32-Mbit 2Mb x16 / Dual Bank / Page Flash Memory |
Cypress |
CY7C1426JV18 |
(CY7C14xxJV18) 36-Mbit QDR-II SRAM 4-Word Burst Architecture |
Cypress |
CY7C1460KV33 |
36-Mbit (1M x 36/2M x 18) Pipelined SRAM |
Cypress |
CY7C1441KV33 |
36-Mbit (1M x 36/2M x 18) Flow-Through SRAM |
Cypress |
CY7C1219F |
1-Mbit (32K x 36) Pipelined DCD Sync SRAM |
Cypress |
CY7C1422AV18 |
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture |
Cypress |
CY7C1422BV18 |
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture |
Cypress |
CY7C1265KV18 |
36-Mbit QDR II+ SRAM Four-Word Burst Architecture |
Cypress |
CY7C1461KV33 |
36-Mbit (1M x 36/2M x 18) Flow-Through SRAM |
Cypress |
CY7C1411KV18 |
36-Mbit QDR II SRAM Four-Word Burst Architecture |
Cypress |
CY7C1268KV18 |
36-Mbit DDR II+ SRAM Two-Word Burst Architecture |
STMicroelectronics |
M36W108AT |
8 Mbit 1Mb x8 / Boot Block Flash Memory and 1 Mbit 128Kb x8 SRAM |
Cypress |
CY7C1429BV18 |
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture |
Cypress |
CYF1072V |
18/36/72-Mbit Programmable 2-Queue FIFOs |
Cypress |
CY7C2263XV18 |
36-Mbit QDR II+ Xtreme SRAM Four-Word Burst Architecture |
STMicroelectronics |
M36L0R7050 |
128 Mbit (Multiple Bank / Multi-Level / Burst) Flash Memory 32 Mbit (2M x16) PSRAM |
Cypress |
CY7C1357C |
(CY7C1355C / CY7C1357C) 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM |
Cypress |
CY7C1219H |
1-Mbit (32K x 36) Pipelined DCD Sync SRAM |