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CDCVF855 - 2.5-V PHASE-LOCKED-LOOP CLOCK DRIVER

Datasheet Summary

Description

The CDCVF855 is a high-performance, low-skew, low-jitter, zero-delay buffer that distributes a differential clock input pair (CLK, CLK) to 4 differential pairs of clock outputs (Y[0:3], Y[0:3]) and one differential pair of feedback clock outputs (FBOUT, FBOUT).

Features

  • Spread-Spectrum Clock Compatible.
  • Operating Frequency: 60 MHz to 220 MHz.
  • Low Jitter (Cycle-Cycle): ±60 ps (±40 ps at 200 MHz).
  • Low Static Phase Offset: ±50 ps.
  • Low Jitter (Period): ±60 ps (±30 ps at 200 MHz).
  • 1-to-4 Differential Clock Distribution (SSTL2).
  • Best in Class for VOX = VDD/2 ±0.1 V.
  • Operates From Dual 2.6-V or 2.5-V Supplies.
  • Available in a 28-Pin TSSOP Package.
  • Consumes < 100-µA Quiescent Curr.

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Datasheet preview – CDCVF855

Datasheet Details

Part number CDCVF855
Manufacturer Texas Instruments
File Size 382.83 KB
Description 2.5-V PHASE-LOCKED-LOOP CLOCK DRIVER
Datasheet download datasheet CDCVF855 Datasheet
Additional preview pages of the CDCVF855 datasheet.

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Full PDF Text Transcription

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CDCVF855 www.ti.com SCAS839A – APRIL 2007 – REVISED MAY 2007 2.5-V PHASE-LOCKED-LOOP CLOCK DRIVER FEATURES • Spread-Spectrum Clock Compatible • Operating Frequency: 60 MHz to 220 MHz • Low Jitter (Cycle-Cycle): ±60 ps (±40 ps at 200 MHz) • Low Static Phase Offset: ±50 ps • Low Jitter (Period): ±60 ps (±30 ps at 200 MHz) • 1-to-4 Differential Clock Distribution (SSTL2) • Best in Class for VOX = VDD/2 ±0.1 V • Operates From Dual 2.6-V or 2.
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