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CDCLVP1212 - High-Performance Clock Buffer

Datasheet Summary

Description

The CDCLVP1212 is a highly versatile, low additive jitter buffer that can generate 12 copies of LVPECL clock outputs from one of two selectable LVPECL, LVDS, or LVCMOS inputs for a variety of communication applications.

It has a maximum clock frequency up to 2 GHz.

Features

  • 1 2:12 Differential Buffer.
  • Selectable Clock Inputs Through Control Terminal.
  • Universal Inputs Accept LVPECL, LVDS, and LVCMOS/LVTTL.
  • 12 LVPECL Outputs.
  • Maximum Clock Frequency: 2 GHz.
  • Maximum Core Current Consumption: 88 mA.
  • Very Low Additive Jitter:.

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Datasheet preview – CDCLVP1212

Datasheet Details

Part number CDCLVP1212
Manufacturer Texas Instruments
File Size 1.78 MB
Description High-Performance Clock Buffer
Datasheet download datasheet CDCLVP1212 Datasheet
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Product Folder Sample & Buy Technical Documents Tools & Software Support & Community CDCLVP1212 SCAS886E – AUGUST 2009 – REVISED DECEMBER 2015 CDCLVP1212 LVPECL Output, High-Performance Clock Buffer 1 Features •1 2:12 Differential Buffer • Selectable Clock Inputs Through Control Terminal • Universal Inputs Accept LVPECL, LVDS, and LVCMOS/LVTTL • 12 LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 88 mA • Very Low Additive Jitter: <100 fs, rms in 10-kHz to 20-MHz Offset Range: – 57 fs, rms (typ) @ 122.88 MHz – 48 fs, rms (typ) @ 156.25 MHz – 30 fs, rms (typ) @ 312.5 MHz • 2.375-V to 3.
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