TH50VSF3681AASB - SRAM AND FLASH MEMORY MIXED MULTI-CHIP PACKAGE

Toshiba

Datasheet Details

Part number	TH50VSF3681AASB
Manufacturer	Toshiba
File Size	585.37 KB
Description	SRAM AND FLASH MEMORY MIXED MULTI-CHIP PACKAGE
Datasheet	TH50VSF3681AASB Datasheet

The TH50VSF3680/3681AASB is a mixed multi-chip package containing a 8,388,608-bit Full CMOS SRAM and a 67,108,864-bit flash memory.

The CIOS and CIOF inputs can be used to select the optimal memory configuration.

The power supply.

TH50VSF3680/3681AASB TENTATIVE TOSHIBA MULTI-CHIP INTEGRATED CIRCUIT SILICON GATE CMOS SRAM AND FLASH MEMORY MIXED MULTI-CHIP.

Power supply voltage VCCs = 2.7 V~3.3 V VCCf = 2.7 V~3.3 V Data retention supply voltage VCCs = 1.5 V~3.3 V Current consumption Operating: 45 mA maximum (CMOS level) Standby: 10 µA maximum (SRAM CMOS level) Standby: 10 µA maximum (FLASH) Block erase architecture for flash memory 8 × 8 Kbytes 63 × 64 Kbytes Organization CIOF VCC VCC VSS CIOS VCC VSS VSS Flash Memory 4,194,304 words of 16 bits 4,194,304 words of 16 bits 8,388,608 words of 8 bits SRAM 524,288 words of.

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