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TH50VSF2581AASB - SRAM AND FLASH MEMORY MIXED MULTI-CHIP

Download the TH50VSF2581AASB datasheet PDF. This datasheet also covers the TH50VSF2580AASB variant, as both devices belong to the same sram and flash memory mixed multi-chip family and are provided as variant models within a single manufacturer datasheet.

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Note: The manufacturer provides a single datasheet file (TH50VSF2580AASB_ToshibaSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number TH50VSF2581AASB
Manufacturer Toshiba
File Size 609.49 KB
Description SRAM AND FLASH MEMORY MIXED MULTI-CHIP
Datasheet download datasheet TH50VSF2581AASB Datasheet

General Description

The TH50VSF2580/2581AASB is a mixed multi-chip package containing a 4,194,304-bit full CMOS SRAM and a 33,554,432-bit flash memory.

The CIOS and CIOF inputs can be used to select the optimal memory configuration.

The power supply for the TH50VSF2580/2581AASB can range from 2.7 V to 3.6 V.

Overview

TH50VSF2580/2581AASB TENTATIVE TOSHIBA MULTI-CHIP INTEGRATED CIRCUIT SILICON GATE CMOS SRAM AND FLASH MEMORY MIXED MULTI-CHIP.

Key Features

  • Power supply voltage VCCs = 2.7 V~3.6 V V = 2.7 V~3.6 V www. DataSheet4U. comCCf.
  • Data retention supply voltage VCCs = 1.5 V~3.6 V.
  • Current consumption Operating: 45 mA maximum (CMOS level) Standby: 7 µA maximum (SRAM CMOS level) Standby: 10 µA maximum (flash CMOS level).
  • Block erase architecture for flash memory 8 blocks of 8 Kbytes 63 blocks of 64 Kbytes.
  • Organization.
  • CIOF VCC VCC VSS CIOS VCC VSS VSS Flash Memory 2,097,152 words of 16 bits 2,097,152.

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