Note: Below is a high-fidelity text extraction (approx. 800 characters) for
BS108. For precise diagrams, and layout, please refer to the original PDF.
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by BS108/D Logic Level TMOS BS108 ® 1 DRAIN N–Channel Enhancement Mode This TMOS FET is designed for high voltag...
View more extracted text
N N–Channel Enhancement Mode This TMOS FET is designed for high voltage, high speed switching applications such as line drivers, relay drivers, CMOS logic, microprocessor or TTL to high voltage interface and high voltage display drivers. • Low Drive Requirement, VGS = 3.0 V max • Inherent Current Sharing Capability Permits Easy Paralleling of many Devices 2 GATE 3 SOURCE 1 2 3 200 VOLTS N–CHANNEL TMOS POWER FET LOGIC LEVEL CASE 29–04, STYLE 30 TO–92 MAXIMUM RATINGS Rating Drain – Source Voltage Gate–Source Voltage Drain Current Continuous(1) Pulsed(2) Total Power Dissipation @ TA = 25°C Derate above TA = 25°C Operating and
BS108 Datasheet
