ZL30120 - SONET/SDH/Ethernet Multi-Rate Line Card Synchronizer

Zarlink Semiconductor

Datasheet Details

Part number	ZL30120
Manufacturer	Zarlink Semiconductor
File Size	349.94 KB
Description	SONET/SDH/Ethernet Multi-Rate Line Card Synchronizer
Datasheet	ZL30120_ZarlinkSemiconductor.pdf

11 1.1 DPLL

Synchronizes with standard telecom system references and synthesizes a wide variety of protected telecom line interface clocks that are compliant with Telcordia GR-1244-CORE, GR-253CORE, ITU-T G.813, and compatible with ITU-T G.8261 (formerly G. pactiming) Internal low jitter APLL provides SONET/SDH clocks including 6.48 MHz, 19.44 MHz, 38.88 MHz, 51.84 MHz and 77.76 MHz, or 25 MHz and 50 MHz Synchronous Ethernet output clocks Programmable output synthesizers (P0, P1) generate general p.

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Published: Mar 28, 2007 |