ZL30102 Datasheet - Zarlink Semiconductor

ZL30102, T1/E1 Stratum 4/4E Redundant System Clock Synchronizer

ZL30102 T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110 Data Sheet .
The ZL30102 DS1/E1 Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization for DS1/E1 transmission equipme.

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Datasheet Details

Part number:

ZL30102

Manufacturer:

Zarlink Semiconductor

File Size:

553.24 KB

Description:

T1/E1 Stratum 4/4E Redundant System Clock Synchronizer

Features

* Synchronizes to clock-and-sync-pair to maintain minimal phase skew between an H.110 primary master clock and a secondary master clock
* Supports Telcordia GR-1244-CORE Stratum 4 and 4E
* Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces
* Sup

Applications

* Synchronization and timing control for multi-trunk DS1/ E1 terminal systems such as DSLAMs, Gateways and PBXs
* Clock and frame pulse source for H.110 CT Bus, ST-BUS, GCI and other time division multiplex (TDM) buses REF0 REF1 REF2 REF2_SYNC REF_FAIL0 REF_FAIL1 REF_FAIL2 OOR_SEL R

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ZL30102 Stratum Redundant System Clock Synchronizer Zarlink Semiconductor

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