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TP65H300G4LSG 650V SuperGaN FET

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Description

Specifications in this document are tentative and subject to change Datasheet TP65H300G4LSG 650V SuperGaN® FET in PQFN (source tab) PDereslcimripinta.

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Features

* JEDEC-qualified GaN technology
* Dynamic RDS(on)eff production tested
* Robust design, defined by
* Intrinsic lifetime tests
* Wide gate safety margin
* Transient over-voltage capability
* Enhanced inrush current capability
* Very low QRR
* Reduced c

Applications

* Consumer
* Power adapters
* Low power SMPS
* Lighting Key Specifications VDSS (V) VDSS(TR) (V) 650 800 RDS(on) (mΩ) max
* 312 QRR (nC) typ 23 QG (nC) typ 9.6
* Dynamic R ; DS(on) see Figures 18 and 19 Cascode Schematic Symbol Cascode Device Structure TP65H300G4LSG

TP65H300G4LSG Distributors

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