QS5917T Datasheet (Integrated Device Technology) - LOW SKEW CMOS PLL CLOCK DRIVER

QS5917T, LOW SKEW CMOS PLL CLOCK DRIVER

The QS5917T Clock Driver uses an internal phase locked loop (PLL) to lock low skew outputs to one of two reference clock inputs.

Eight outputs are available: Q0-Q4, 2xQ, Q/2, Q5.

Careful layout and design insures < 500ps skew between the Q0-Q4, and Q/2 outputs.

The QS5917T includes an internal RC fi

QS5917T Features

* QS5917T 5V operation 2xQ output, Q/2 output, Q output Outputs tri-state while RST low Internal loop filter RC network Low noise TTL level outputs < 500ps output skew,