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IS41LV8512, IS41C8512 512K x 8 (4-MBIT) DYNAMIC RAM

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Description

IS41C8512 IS41LV8512 .EATURES www.datasheet4u.com 512K x 8 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE Extended Data-Out (EDO) Page Mode access cycle TTL.
The 1+51 IS41C8512 and IS41LV8512 is a 524,288 x 8-bit high-performance CMOS Dynamic Random Access Memories.

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This datasheet PDF includes multiple part numbers: IS41LV8512, IS41C8512. Please refer to the document for exact specifications by model.
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Datasheet Specifications

Part number
IS41LV8512, IS41C8512
Manufacturer
Integrated Circuit Solution
File Size
245.88 KB
Datasheet
IS41C8512_IntegratedCircuitSolution.pdf
Description
512K x 8 (4-MBIT) DYNAMIC RAM
Note
This datasheet PDF includes multiple part numbers: IS41LV8512, IS41C8512.
Please refer to the document for exact specifications by model.

Applications

* The IS41C8512 is packaged in a 28-pin 400mil SOJ and 400mil TSOP-2. KEY TIMING PARAMETERS Parameter Max. RAS Access Time (tRAC) Max. CAS Access Time (tCAC) Max. Column Address Access Time (tAA) Min. EDO Page Mode Cycle Time (tPC) Min. Read/Write Cycle Time (tRC) -35 35 10 18 12 60 -50 50 14 25 20

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