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CY7C12701KV18, CY7C12661KV18 1.8 V synchronous pipelined SRAM

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Description

CY7C12661KV18, CY7C12771KV18 CY7C12681KV18, CY7C12701KV18 36-Mbit DDR II+ SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 36-Mbit DDR II+ SRA.

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This datasheet PDF includes multiple part numbers: CY7C12701KV18, CY7C12661KV18. Please refer to the document for exact specifications by model.
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Datasheet Specifications

Part number
CY7C12701KV18, CY7C12661KV18
Manufacturer
Cypress Semiconductor
File Size
571.92 KB
Datasheet
CY7C12661KV18-CypressSemiconductor.pdf
Description
1.8 V synchronous pipelined SRAM
Note
This datasheet PDF includes multiple part numbers: CY7C12701KV18, CY7C12661KV18.
Please refer to the document for exact specifications by model.

Features

* 36-Mbit density (4 M × 8, 4 M × 9, 2 M × 18, 1 M × 36)
* 550 MHz clock for high bandwidth
* 2-word burst for reducing address bus frequency
* Double data rate (DDR) interfaces (data transferred at 1100 MHz) at 550 MHz
* Available in 2.5 clock cycle latency
* Two input clock

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