CY7C1263KV18 36-Mbit QDR II+ SRAM Four-Word Burst Architecture

Cypress Semiconductor

Description

CY7C1263KV18/CY7C1265KV18 36-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) 36-Mbit QDR® II+ SRAM Four-Word Burst Architect.

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Datasheet Specifications

Part number: CY7C1263KV18
Manufacturer: Cypress Semiconductor
File Size: 1.23 MB
Datasheet: CY7C1263KV18-CypressSemiconductor.pdf
Description: 36-Mbit QDR II+ SRAM Four-Word Burst Architecture

Features

* Separate independent read and write data ports
* Supports concurrent transactions
* 550 MHz clock for high bandwidth
* Four-word burst for reducing address bus frequency
* Double data rate (DDR) Interfaces on both read and write ports (data transferred at 1100 MHz) at 550 MHz

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CY7C1263KV18 36-Mbit QDR II + SRAM Four-Word Burst Architecture Cypress Semiconductor

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