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PhaseLink Corporation

PL611S-15 Datasheet Preview

PL611S-15 Datasheet

PicoPLLTM 32K Programmable Clock

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P(Preliminary) L611s-15
1.8V-3.3V PicoPLLTM 32K Programmable Clock
FEATURES
Advanced Programmable PLL design for low-
frequency (KHz) input applications.
OTP selectable AC/DC Ref. Coupling.
Accepts <1.0V reference signal input voltage
Very low Jitter and Phase Noise (30-70ps Pk-Pk typical)
Output frequency up to
o 133MHz @ 1.8V operation
o 166MHz @ 2.5V operation
o 200MHz @ 3.3V operation
www.DataSheet4UO.cffoemred in Tiny GREEN/RoHS compliant packages
o 6-pin DFN (2.0mmx1.3mmx0.6mm)
o 6-pin SC70 (2.3mmx2.25mmx1.0mm)
o 6-pin SOT23 (3.0mmx3.0mmx1.35mm)
Input Frequency: 10KHz – 200MHz
Single 1.8V, 2.5V, or 3.3V ± 10% power supply
Operating temperature range from 0°C to 70°C
DESCRIPTION
The PL611s-15 is a low-cost general purpose
frequency synthesizer and a member of PhaseLink’s
PicoPLLTM Factory Programmable ‘Quick Turn Clock
(QTC)’ family. Designed to fit in a small SOT23,
SC70, or DFN package for high performance
applications, the PL611s-15 accepts low frequency
(>10KHz) Reference input and generates up to
200MHz output with the best phase noise, jitter
performance, and power consumption for handheld
devices and notebook applications. Cascading
PL611s-15 with other PicoPLL ICs could result in
producing all required system clocks with specific
savings in board space, power consumption, and
cost.
PACKAGE PIN ASSIGNMENT
FIN 1
GNDA 2
VDD 3
6 LF
5 GND
4 CLK0
DFN-6L
(2.0mmx1.3mmx0.6mm)
FIN 1 6 LF
GNDA 2 5 GND
VDD 3 4 CLK0
SC70-6L
(2.3mmx2.25mmx1.0mm)
VDD
GNDA
FIN
1
2
3
6 CLK0
5 GND
4 LF
SOT23-6L
(3.0mmx3.0mmx1.35mm)
BLOCK DIAGRAM
FIN
R-Counter
(7-bit)
Phase
Charge
M-Counter
Detector
Pump
(16-bit)
FVCO = FRef * (2* M/R)
VCO
Programmable Function
P-Counter
FOut = FVCO /2*P (4-bit)
CLK0
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 07/18/06 Page 1




PhaseLink Corporation

PL611S-15 Datasheet Preview

PL611S-15 Datasheet

PicoPLLTM 32K Programmable Clock

No Preview Available !

P(Preliminary) L611s-15
1.8V-3.3V PicoPLLTM 32K Programmable Clock
PACKAGE PIN ASSIGNMENT
Name
VDD
Pin #
SOT SC70 DFN
1 33
Type
P
Description
VDD connection.
GNDA
2
2
2
P Ground connection for Analog Circuitry.
FIN 3 1 1
I Reference input pin.
LF 4 6 6
I Loop Filter input pin.
www.DataSheet4U.GcoNmD
5
5
5
P GND connection
CLK0
6
4
4
O Programmable Clock Output
GUIDELINES FOR EXTERNAL COMPONENT SELECTION
For the optimum performance, accurate external loop filter components must be selected. A general guideline for
selecting these components based on the input frequency is shown in the below table. Please contact PhaseLink
for more accurate component selections.
Input frequency
3MHz ~ 200MHz
300KHz ~ 10MHz
30KHz ~ 1.0MHz
10KHz ~ 100KHz
Capacitor Value
4.7nF
4.7nF
4.7nF
47nF
Resistor Value
2.2K
6.8K
22K
22K
APPLICATION RECOMMENDATIONS FOR PL611s-15
PL611s-15 can accept a reference input >10KHz and produce a clock output in the MHz range, as shown in the
diagram ‘1’, below. However, to save costs in consumer product system designs and for greater area optimization,
it is possible to use the XOUT of the RTC crystal (32.768KHz) as the reference input to the PL611s-15, as shown
in diagram ‘2’, below.
REFIN
1.8~3.3V
LF
LPGND
MHZ CLK
(Any Frequency
Diagram ‘1’
XIN
C1 32.H76z8K
C2 XOUT
XIN
ASIC
XOUT
REFIN
1.8~3.3V
LF
LPGND
MHZ CLK
(Any Frequency)
Diagram ‘2’
Note: An AC Coupling Cap may be required if RTC Clock amplitude is too small.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 07/18/06 Page 2


Part Number PL611S-15
Description PicoPLLTM 32K Programmable Clock
Maker PhaseLink Corporation
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