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IS42VS83200D - 256-MBIT SYNCHRONOUS DRAM

Description

A0-A12 Row Address Input A0-A9 Column Address Input BA0, BA1 Bank Select Address DQ0 to DQ7 Data I/O CLK System Clock Input CKE Clock Enable CS Chip Select RAS Row Address Strobe Command CAS Column Address Strobe Command WE DQM Vdd Vss Vddq Vssq NC Writ

Features

  • Clock frequency: 133, 125 MHz.
  • Fully synchronous; all signals referenced to a positive clock edge.
  • Internal bank for hiding row access/precharge.
  • Single Power supply: 1.8V + 0.1V.
  • LVCMOS interface.
  • Programmable burst length.
  • (1, 2, 4, 8, full page).
  • Programmable burst sequence: Sequential/Interleave.
  • Auto Refresh (CBR).
  • Self Refresh.
  • 8K refresh cycles every 16 ms (A2 grade) or 8K refres.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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IS42VS83200D, IS42VS16160D IS45VS83200D, IS45VS16160D 32Meg x 8, 16Meg x16 PRELIMINARY INFORMATION 256-MBIT SYNCHRONOUS DRAM MAY 2009 FEATURES • Clock frequency: 133, 125 MHz • Fully synchronous; all signals referenced to a positive clock edge • Internal bank for hiding row access/precharge • Single Power supply: 1.8V + 0.
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