* Clock frequency: 133, 125 MHz
* Fully synchronous; all signals referenced to a positive clock edge
* Internal bank for hiding row access/precharge
*.

A0-A12 Row Address Input A0-A9 Column Address Input BA0, BA1 Bank Select Address DQ0 to DQ7 Data I/O CLK System Clock Input CKE Clock Enable CS Chip Select RAS Row Address Strobe Command CAS Column Address Strobe.

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