QS5917T driver equivalent, low skew cmos pll clock driver.
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QS5917T
5V operation 2xQ output, Q/2 output, Q output Outputs tri-state while RST low Int.
to be customized for linear VCO operation over a wide range of input SYNC frequencies. The VCO can also be disabled by t.
The QS5917T Clock Driver uses an internal phase locked loop (PLL) to lock low skew outputs to one of two reference clock inputs. Eight outputs are available: Q0-Q4, 2xQ, Q/2, Q5. Careful layout and design insures < 500ps skew between the Q0-Q4, and Q.
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