QS532806A driver/buffer equivalent, guaranteed low skew 3.3v cmos clock driver/buffer.
− − − − − − − − JEDEC compatible LVTTL level 10 low skew clock outputs Monitor output Clock inputs are 5V tolerant Pinout and function compatible with QS5806 25Ω on-chip.
The QS532806 clock driver/buffer circuit can be used for clock buffering schemes where low skew is a key parameter. The QS532806 offers two banks of five inverting outputs. Designed in IDT's proprietary CMOS process, these devices provide low propaga.
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