| Part number | QS5919T |
|---|---|
| Datasheet | QS5919T_IntegratedDeviceTechnology.pdf |
| File Size | 163.47 KB |
| Manufacturer | Integrated Device Technology |
| Description | LOW SKEW TTL PLL CLOCK DRIVER |
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The QS5919T Clock Driver uses an internal phase locked loop (PLL) to lock low skew outputs to one of two reference clock inputs. Eight outputs are available: Careful layout and design ensure < 350ps skew between the Q0-Q4, and Q/2 outputs.
See all Integrated Device Technology datasheets
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