QS5919T Datasheet | Integrated Device Technology

.DataSheet.co.kr QS5919T LOW SKEW TTL PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER INDUSTRIAL TEMPERATURE RANGE LOW SKEW TTL PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER Features : - - - - - - - - - - - - 5V operation Low noise TTL level outputs < 350ps output skew, Q0- Q4 2xQ output, Q outputs, Q output, Q/2 output Outputs 3-state and reset while OE/RST low PLL disable feature for low frequency testing Internal loop filter RC network Functional equivalent to Motorola MC88915 Positive or negative edge synchronization (PE) Balanced drive outputs ±24mA 160MHz maximum frequency (2xQ output) Available in QSOP and PLCC packages DESCRIPTION The QS5919T Clock Driver uses an internal...