CY7C1370DV25
Features
- Pin-patible and functionally equivalent to ZBT™
- Supports 200-MHz bus operations with zero wait states
- Available speed grades are 200 and 167 MHz
- Internally self-timed output buffer control to eliminate the need to use asynchronous OE
- Fully registered (inputs and outputs) for pipelined operation
- Byte write capability
- Single 2.5 V core power supply (VDD)
- 2.5 V I/O power supply (VDDQ)
- Fast clock-to-output times
- 3.0 ns (for 200-MHz device)
- Clock enable (CEN) pin to suspend operation
- Synchronous self-timed writes
- Available in JEDEC-standard Pb-free 100-pin TQFP, and non
Pb-free 165-ball FBGA packages
- IEEE 1149.1 JTAG-patible boundary scan
- Burst capability
- linear or interleaved burst order
- “ZZ” sleep mode option and stop clock...
