CY7C1329H sram equivalent, 2-mbit pipelined sync sram.
* Registered inputs and outputs for pipelined operation
* 64 K × 32 common I/O architecture
* 3.3 V core power supply
* 2.5 V/3.3 V I/O operation
* Fa.
The CY7C1329H SRAM integrates 64 K × 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter
for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (.
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