CY7C1327G Description
The CY7C1327G SRAM integrates 256K × 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered clock input (CLK). The synchronous inputs include all addresse.
CY7C1327G Key Features
- Registered inputs and outputs for pipelined operation
- 256K × 18 mon I/O Architecture
- 3.3 V core power supply (VDD)
- 2.5 V I/O power supply (VDDQ)
- Fast clock-to-output times
- 3.5 ns (for 166-MHz device)
- Provide high performance 3-1-1-1 access rate
- User-selectable burst counter supporting Intel Pentium
- Separate processor and controller address strobes
- Synchronous self-timed writes