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CY2SSTU877 - 10-Output JEDEC-Compliant Zero Delay Buffer

CY2SSTU877 Description

www.DataSheet4U.com PRELIMINARY CY2SSTU877 1.8V, 500-MHz, 10-Output JEDEC-Compliant Zero Delay Buffer .
The CY2SSTU877 is a high-performance, low-skew, low-jitter zero delay buffer designed to distribute differential clocks in high-speed applications.

CY2SSTU877 Features

* Operating frequency: 125 MHz to 500 MHz
* Supports DDRII SDRAM
* Ten differential outputs from one differential input
* Spread-Spectrum-compatible
* Low jitter (cycle-to-cycle): < 40 ps
* Very low skew: < 40 ps
* Power management control inpu

📥 Download Datasheet

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Datasheet Details

Part number
CY2SSTU877
Manufacturer
Cypress Semiconductor
File Size
253.19 KB
Datasheet
CY2SSTU877_CypressSemiconductor.pdf
Description
10-Output JEDEC-Compliant Zero Delay Buffer

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10-Output JEDEC-Compliant Zero Delay Buffer Cypress Semiconductor
Cypress Semiconductor CY2SSTU877-like datasheet