CY2SSTU877 buffer equivalent, 10-output jedec-compliant zero delay buffer.
* Operating frequency: 125 MHz to 500 MHz
* Supports DDRII SDRAM
* Ten differential outputs from one differential input
* Spread-Spectrum-compatible
*.
The CY2SSTU877 generates ten differential pair clock outputs from one differential pair clock input. In addition, the C.
The CY2SSTU877 is a high-performance, low-skew, low-jitter zero delay buffer designed to distribute differential clocks in high-speed applications. The CY2SSTU877 generates ten differential pair clock outputs from one differential pair clock input. I.
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