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SN74SSTU32864 - 25-BIT CONFIGURABLE REGISTERED BUFFER

Datasheet Summary

Description

This 25-bit 1:1 or 14-bit 1:2 configurable registered buffer is designed for 1.7-V to 1.9-V VCC operation.

In the 1:1 pinout configuration, only one device per DIMM is required to drive nine SDRAM loads.

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Datasheet Details

Part number SN74SSTU32864
Manufacturer Texas Instruments
File Size 513.24 KB
Description 25-BIT CONFIGURABLE REGISTERED BUFFER
Datasheet download datasheet SN74SSTU32864 Datasheet
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Full PDF Text Transcription

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SN74SSTU32864 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS SCES434 – MARCH 2003 D Member of the Texas Instruments Widebus+ Family D Pinout Optimizes DDR-II DIMM PCB Layout D Configurable as 25-Bit 1:1 or 14-Bit 1:2 Registered Buffer D Chip-Select Inputs Gate the Data Outputs from Changing State and Minimizes System Power Consumption D Output Edge-Control Circuitry Minimizes Switching Noise in an Unterminated Line D Supports SSTL_18 Data Inputs D Differential Clock (CLK and CLK) Inputs D Supports LVCMOS Switching Levels on the Control and RESET Inputs D RESET Input Disables Differential Input Receivers, Resets All Registers, and Forces All Outputs Low D Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II D ESD Protection Exceeds JESD 22 – 5000-V Human-Body
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