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SN74SSTEB32866 - 1.5V/1.8V 25-BIT CONFIGURABLE REGISTERED BUFFER

Datasheet Summary

Description

This 25-bit 1:1 or 14-bit 1:2 configurable registered buffer is designed for 1.425-V to 1.9-V VCC operation.

In the 1:1 pinout configuration, only one device per DIMM is required to drive nine SDRAM loads.

In the 1:2 pinout configuration, two devices per DIMM are required to drive 18 SDRAM loads.

Features

  • 1.
  • 2 Member of the Texas Instruments Widebus+™ Family.
  • Pinout Optimizes DDR2 DIMM PCB Layout.
  • Configurable as 25-Bit 1:1 or 14-Bit 1:2 Registered Buffer.
  • Chip-Select Inputs Gate the Data Outputs from Changing State and Minimizes System Power Consumption.
  • Output Edge-Control Circuitry Minimizes Switching Noise in an Unterminated Line.
  • Supports 1.5V and 1.8V Supply Voltage Range.
  • Differential Clock (CLK and CLK) Inputs.
  • Suppor.

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Datasheet Details

Part number SN74SSTEB32866
Manufacturer Texas Instruments
File Size 1.43 MB
Description 1.5V/1.8V 25-BIT CONFIGURABLE REGISTERED BUFFER
Datasheet download datasheet SN74SSTEB32866 Datasheet
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Full PDF Text Transcription

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SN74SSTEB32866 www.ti.com..................................................................................................................................................................................................... SCAS851 – APRIL 2009 1.5V/1.8V 25-BIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESS-PARITY TEST FEATURES 1 •2 Member of the Texas Instruments Widebus+™ Family • Pinout Optimizes DDR2 DIMM PCB Layout • Configurable as 25-Bit 1:1 or 14-Bit 1:2 Registered Buffer • Chip-Select Inputs Gate the Data Outputs from Changing State and Minimizes System Power Consumption • Output Edge-Control Circuitry Minimizes Switching Noise in an Unterminated Line • Supports 1.5V and 1.
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