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SN74LVC2G08-EP - Dual 2-Input Positive-AND Gate

Description

This dual 2-input positive-AND gate is designed for 1.65-V to 5.5-V VCC operation.

B or Y + A ) B in positive logic.

This device is fully specified for partial-power-down applications using Ioff.

Features

  • 1.
  • Controlled Baseline.
  • One Assembly.
  • One Test Site.
  • One Fabrication Site.
  • Enhanced Diminishing Manufacturing Sources (DMS) Support.
  • Enhanced Product-Change Notification.
  • Qualification Pedigree (1).
  • Supports 5-V VCC Operation.
  • Inputs Accept Voltages to 5.5 V.
  • Max tpd of 5.7 ns at 3.3 V.
  • Low Power Consumption, 10 μA Max ICC.
  • ±24 mA Output Drive at 3.3 V.
  • Typical VOLP (Output Ground.

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Full PDF Text Transcription

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www.ti.com SN74LVC2G08-EP DUAL 2-INPUT POSITIVE-AND GATE SGDS032 – SEPTEMBER 2007 FEATURES 1 • Controlled Baseline – One Assembly – One Test Site – One Fabrication Site • Enhanced Diminishing Manufacturing Sources (DMS) Support • Enhanced Product-Change Notification • Qualification Pedigree (1) • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Max tpd of 5.7 ns at 3.3 V • Low Power Consumption, 10 μA Max ICC • ±24 mA Output Drive at 3.3 V • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C (1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range.
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