SN74LVC1G125
Description
The UMW SN74LVC1G125 is a high performance non-inverting buffer operating from a 1.65V to 5.5V supply. This device is fabricated with advanced CMOS technology to achieve ultra-high speed with high output drive.
3.Pinning information
2.Features
Designed for 1.65V to 5.5V VCC Operation Overvoltage Tolerant Inputs 24 m A Balanced Output Sink and Source Capability Near Zero Static Supply Current Substantially Reduces System Power Requirements These Devices are Pb-Free and are Ro HS pliant 3-State OE Input is Active-Low
OE 1 INA 2 GND 3
5 VCC 4Y
OE 1 INA 2 GND 3
6 VCC 5 NC 4Y
SOT23-5/SC70-5
DFN6
Figure1. Pinouts (Top View)
UTD Semiconductor Co.,Limited .umw-ic.
May.2025
1 of 14
.umw-ic.
4.Pin Function
SC70-5/ SOT23-5 Pin 1 2 3 4 5
DFN6 Pin 1 2 3 4 5 6
UMW SN74LVC1G125
Function OE INA GND Y VCC
Function OE INA GND Y NC VCC
2 of 14
UTD Semiconductor Co.,Limited May.2025
.umw-ic.
UMW SN74LVC1G125
5.Block Diagram
Figure2. Logic Symbol
Function...
