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S5T8808A - PLL FREQUENCY SHNTHESIZER FOR PAGER

Description

Pin No 1 2 3 4 Symbol OSCI OSCO VDD2 PDA I/O I O

O Description These input / output pins generate the reference frequency.

In case of OSCI Pin, external reference frequency can be used through the AC coupling.

Features

  • Maximum operating frequency: 120MHz @ 500mVP-P, VDD1 = 0.95V, VDD2 = 3.0V 165MHz @ 500mVP-P, VDD1 = 1.0V, VDD2 = 3.0V ( Magnification = 1 : 4 ).
  • On-chip reference oscillator supports external crystal which oscillates up to 18MHz Superior supply current: FFIN = 90MHz, IDD1 = 0.6mA (Typ. ) @ VDD1 = 1.0V, VDD2 = 3.0V FFIN = 150MHz, IDD1 = 0.9mA (Typ. ) @ VDD1 = 1.0V, VDD2 = 3.0V Operating voltage: VDD1 = 0.95 ~ 2.0V and VDD2 = 2.0 ~ 3.3V Reference frequency counter div.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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PLL FREQUENCY SHNTHESIZER FOR PAGER S5T8808A INTRODUCTION S5T8808A is a superior low-power-programmable PLL frequency synthesizer which can be used in a high performance Wide Area Pager system. S5T8808A consists of 2 kinds of divider block including a 17bit Shift register, 16-bit Latch, 14/16-bits Counter, Prescaler, and a phase detector block including a Phase detector, Lock detector and a Charge pump. 16−TSSOP−0044 FEATURES • Maximum operating frequency: 120MHz @ 500mVP-P, VDD1 = 0.95V, VDD2 = 3.0V 165MHz @ 500mVP-P, VDD1 = 1.0V, VDD2 = 3.0V ( Magnification = 1 : 4 ) • • On-chip reference oscillator supports external crystal which oscillates up to 18MHz Superior supply current: FFIN = 90MHz, IDD1 = 0.6mA (Typ.) @ VDD1 = 1.0V, VDD2 = 3.0V FFIN = 150MHz, IDD1 = 0.9mA (Typ.
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