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BLD6G21LS-50 - TD-SCDMA 2010 MHz to 2025 MHz fully integrated Doherty transistor

Download the BLD6G21LS-50 datasheet PDF. This datasheet also covers the BLD6G21L-50 variant, as both devices belong to the same td-scdma 2010 mhz to 2025 mhz fully integrated doherty transistor family and are provided as variant models within a single manufacturer datasheet.

Description

The BLD6G21L-50 and BLD6G21LS-50 incorporate a fully integrated Doherty solution using NXP’s state of the art GEN6 LDMOS technology.

This device is perfectly suited for TD-SCDMA base station applications at frequencies from 2010 MHz to 2025 MHz.

Features

  • I Typical TD-SCDMA performance at frequencies from 2010 MHz to 2025 MHz: N Average output power = 8 W N Power gain = 13.5 dB N Efficiency = 42 % I Fully optimized integrated Doherty concept: N integrated asymmetrical power splitter at input N integrated power combiner N peak biasing down to 0 V N low junction temperature N high efficiency I Integrated ESD protection NXP Semiconductors BLD6G21L-50; BLD6G21LS-50 TD-SCDMA 2010 MHz to 2025 MHz fully integrated Doherty transistor I I I I I Good pai.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (BLD6G21L-50_NXPSemiconductors.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number BLD6G21LS-50
Manufacturer NXP Semiconductors
File Size 162.90 KB
Description TD-SCDMA 2010 MHz to 2025 MHz fully integrated Doherty transistor
Datasheet download datasheet BLD6G21LS-50 Datasheet

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Other Datasheets by NXP Semiconductors

Part Number Description
BLD6G21L-50 TD-SCDMA 2010 MHz to 2025 MHz fully integrated Doherty transistor
BLD6G22L-50 W-CDMA 2110 MHz To 2170 MHz Fully Integrated Doherty Transistor
BLD6G22LS-50 W-CDMA 2110 MHz To 2170 MHz Fully Integrated Doherty Transistor

Full PDF Text Transcription

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BLD6G21L-50; BLD6G21LS-50 TD-SCDMA 2010 MHz to 2025 MHz fully integrated Doherty transistor Rev. 01 — 28 October 2009 Objective data sheet 1. Product profile 1.1 General description The BLD6G21L-50 and BLD6G21LS-50 incorporate a fully integrated Doherty solution using NXP’s state of the art GEN6 LDMOS technology. This device is perfectly suited for TD-SCDMA base station applications at frequencies from 2010 MHz to 2025 MHz. The main and peak device, input splitter and output combiner are integrated in a single package. This package consists of one gate and drain lead and two extra leads of which one is used for biasing the peak amplifier and the other is not connected. It only requires the proper input/output match and bias setting as with a normal class-AB transistor. Table 1.
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