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MPC9315 - 2.5V and 3.3V CMOS PLL Clock Generator/Driver

General Description

The MPC9315 utilizes PLL technology to frequency and phase lock its outputs onto an input reference clock.

Normal operation requires a connection of one of the device outputs to the selected feedback (FB0 or FB1) input to close the PLL feedback path.

Key Features

  • Fully integrated PLL supports spread spectrum clocking.
  • Supports.

📥 Download Datasheet

More Datasheets from Motorola Semiconductor (now NXP Semiconductors)

Part Number Description
MPC931 LOW VOLTAGE PLL CLOCK DRIVER
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MPC9330 3.3V / 2.5V 1:6 LVCMOS PLL CLOCK GENERATOR
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MPC9352 3.3V / 2.5V 1:11 LVCMOS ZERO DELAY CLOCK GENERATOR
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MPC93R52 LOW VOLTAGE 3.3V LVCMOS 1:11 CLOCK GENERATOR
MPC9100 DUAL PLL CLOCK GENERATOR

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order Number: MPC9315/D Rev 2, 02/2002 2.5V and 3.3V CMOS PLL Clock Generator and Driver The MPC9315 is a 2.5V and 3.3V compatible, PLL based clock generator designed for low-skew clock distribution in low-voltage mid-range to high-performance telecom, networking and computing applications. The MPC9315 offers 8 low-skew outputs and 2 selectable inputs for clock redundancy. The outputs are configurable and support 1:1, 2:1, 4:1, 1:2 and 1:4 output to input frequency ratios. In addition, a selectable output 180° phase control supports advanced clocking schemes with inverted clock signals. The MPC9315 is specified for the extended temperature range of –40 to +85°C. MPC9315 LOW VOLTAGE 2.5V AND 3.