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IS49NLS18320 - Separate I/O RLDRAM 2 Memory

This page provides the datasheet information for the IS49NLS18320, a member of the IS49NLS96400 Separate I/O RLDRAM 2 Memory family.

Datasheet Summary

Description

1.1 576Mb (64Mx9) Separate I/O BGA Ball‐out (Top View)  1 2 3 4 5678 9 10 11 12 A VREF B VDD C VTT D A221 E A21 F A5 VSS DNU3 DNU3 DNU3 DNU3 DNU3 VEXT DNU3 DNU3 DNU3 DNU3 DNU3 VSS VSSQ VDDQ VSSQ VDDQ VSSQ VSS VEXT TMS TCK VSSQ Q0 D0 VDD VDDQ Q1 D1 VTT VSSQ QK0# QK0 VSS VDDQ

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Datasheet preview – IS49NLS18320

Datasheet Details

Part number IS49NLS18320
Manufacturer Integrated Silicon Solution
File Size 578.04 KB
Description Separate I/O RLDRAM 2 Memory
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IS49NLS96400,IS49NLS18320 576Mb (x9, x18) Separate I/O RLDRAM 2 Memory    FEATURES  ADVANCED INFORMATION JULY 2012  533MHz DDR operation (1.067 Gb/s/pin data  rate)   38.4 Gb/s peak bandwidth (x18 Separate I/O at  533 MHz clock frequency)   Reduced cycle time (15ns at 533MHz)   32ms refresh (16K refresh for each bank; 128K  refresh command must be issued in total each  32ms)   8 internal banks   Non‐multiplexed addresses (address  multiplexing option available)   SRAM‐type interface   Programmable READ latency (RL), row cycle  time, and burst sequence length   Balanced READ and WRITE latencies in order to  optimize data bus utilization     Data mask signals (DM) to mask signal of  WRITE data; DM is sampled on both edges of  DK.
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