IS43R32800F Datasheet PDF - Integrated Silicon Solution 256Mb DDR SDRAM Specs

IS43R32800F - 256Mb DDR SDRAM

This page provides the datasheet information for the IS43R32800F, a member of the IS43R83200F 256Mb DDR SDRAM family.

Datasheet Summary

Description

x8 A0-A12 Row Address Input A0-A9 Column Address Input BA0, BA1 Bank Select Address DQ0 DQ7 Data I/O CK, CK System Clock Input CKE Clock Enable CS Chip Select CAS Column Address Strobe Command RAS Row Address Strobe Command WE Write Enable 4 66 VSS 65 DQ7 64 VSSQ 63 N

Features

DEVICE.

Datasheet Details

Part number	IS43R32800F
Manufacturer	Integrated Silicon Solution
File Size	719.54 KB
Description	256Mb DDR SDRAM
Datasheet	IS43R32800F Datasheet
Additional preview pages of the IS43R32800F datasheet.

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Full PDF Text Transcription

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IS43R83200F IS43/46R16160F, IS43/46R32800F 8Mx32, 16Mx16, 32Mx8 PRELIMINARY INFORMATION 256Mb DDR SDRAM MARCH 2014 FEATURES DEVICE OVERVIEW • VDD and VDDQ: 2.5V ± 0.2V • SSTL_2 compatible I/O • Double-data rate architecture; two data transfers per clock cycle • Bidirectional, data strobe (DQS) is transmitted/ received with data, to be used in capturing data at the receiver • DQS is edge-aligned with data for READs and centre-aligned with data for WRITEs • Differential clock inputs (CK and CK) • DLL aligns DQ and DQS transitions with CK transitions • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS • Four internal banks for concurrent operation • Data Mask for write data.

Published: Jul 25, 2016 |